In recent years, it has come to be realized that there are limits on setting of finer semiconductor design rules, and it has thus been difficult to increase the number of devices in a semiconductor device to make it denser by means of the finer design rules. For this reason, as a new approach to a higher density other than the setting of finer design rules, a three-dimensional mounting technique for semiconductor chips has come under the spotlight. This three-dimensional mounting will be briefly described as follows. It corresponds to “separating two-dimensionally horizontally extended semiconductor devices into groups in accordance with respective functions, and vertically stacking those”. That is, the idea is that the number of devices per unit area is increased by the three-dimensional mounting.
As the three-dimensional mounting, for example, a wire bonding system has come along in which semiconductor chips are stacked and connected to one another by wire bonding. This has brought about a higher density to a certain degree as compared with the conventional two-dimensional semiconductor devices. However, making a thickness of each semiconductor chip not larger than 50 μm is difficult, and further, a bonding mechanism layer (underfill layer) with a thickness of the order of 20 μm is interposed between the semiconductor chips. Hence, also from the viewpoint of a three-dimensional arrangement with respect to processes in the wire bonding, the number of stackable semiconductor chips is limited to the order of 16. Moreover, since the wire that connects the semiconductor chips has an extremely long wiring length, it is disadvantageous to speeding up of the semiconductor device.
Under such circumstances, three-dimensional mounting in a TSV system is recently drawing attention. A TSV is an abbreviation of a through-silicon via, and refers to a through-silicon electrode. In the TSV system, this TSV serves as a connection wire between semiconductor chips. Therefore, the wiring length for connection between the semiconductor chips is significantly small as compared with the wiring length of the wire in the wire bonding system described above. This can reduce a resistance component, a capacitance component and a reactance component of the wire that connects the semiconductor chips, and hence in the TSV system, a signal is resistant to attenuation even when being a high-frequency signal, and hence it is advantageous to speeding up of the semiconductor device.
In the TSV system, the stacked semiconductor chips are bonded to each other in the form of also being electrically connected to each other. Formation of a stacked module by means of the three-dimensional mounting in the TSV system is broadly divided as follows.
(1) A wafer (e.g., silicon wafer) is individually separated (divided) in advance to form a plurality of dice (semiconductor chips), and the dice are bonded to each other to be three-dimensionally mounted, to form stacked modules.
(2) A plurality of wafers are bonded to one another until the number of layers of the wafer stacked reaches an eventual number, to form a wafer stack, which is finally individually separated to form stacked modules.
Currently, (1) is generally performed, and costly advantageous (2) is said to be generally performed in the future. Performing (2) requires a stable, tough wafer stack, in the periphery of which a wafer is not peeled off.